Another very quick post, just to say that we are now able to flash the MEGA65 bitstream into the flash on the FPGA boards. This means that from turning the power on, to seeing Kickstart takes only about 3.5 seconds -- and some of that delay is actually waiting for the monitor to turn on. If the monitor is already on, it can be quite close to 3 seconds, and possibly even a little less.
Power off to seeing C65 READY prompt, allowing time for the monitor to wake up from deep sleep took no more than 4.6 seconds.
This is very pleasing progress, and there is some scope for improvement. We are currently only driving the flash at 22MHz, which at 4 bits wide, and with a ~4MB bitstream. This means that loading the configuration currently takes (8*4x10^6) / 22x10^6*4 = 32x10^6 / 88x10^6 seconds = ~0.37 seconds, plus some overhead for the signaling between the FPGA and flash. I don't currently know the ratio of the overhead. In any case, it might be possible to shave another 0.1 second or so off the 0.37 second figure. Given that the total programming time on the FPGA at present is 1.7 seconds, this suggests that it might actually reduce the start time by more like 0.3 - 0.5 seconds. We will see.
The other thing we can do to improve boot time is to load the C65 ROM from flash instead of the SD card, or otherwise to reduce the SD card setup time.
I tried to find out exactly how long a real C64 takes to power on. My recollection is 1 - 2 seconds. It would be nice to match this, but I am already happy with < 5 seconds, compared to the about 15 seconds that it took loading the bitstream from the SD card. At some point I will post a video showing a MEGA65 booting from flash.