I am continuing to fight with getting the reimplemented CPU and VIC-IV all settled down, however things are getting much closer.
As the following image implies, it can run the C64 ROM (not yet C65 ROM -- it gets stuck in the DOS somewhere). It should be noted that the CPU performance here is not final, and some instructions might end up faster or slower than depicted here. That said, the CPU is certainly quite a bit faster than the old 32MHz one.
44.36x is almost exactly 48mhz/32mhz = 150% the speed of the old CPU at 28.93x. Pleasingly this is before I do anything to optimise the performance. Also, whereas the old CPU filled the FPGA to capacity, with the new CPU about two-thirds of the FPGA remains free -- space for implementing sprites, a 1541 and other goodies as I get the chance.
Speaking of optimisations, one that I may attack in the not too distant future is a stack cache that allows RTS to execute in just 1 cycle. While it will make some impact on the SynthMark64 score, it is more interesting for real-life work loads where JSR/RTS are very common instructions. But otherwise there is no caching anywhere in this -- it is all raw, predictable cycle times, which helps make it feel like a simple 8-bit computer, albeit a very fast one.
What isn't entirely obvious here is that keyboard input has broken for some reason, with my PS/2 keyboard reader failing to detect key-release events. Also, for some reason the CIA interrupts are not always happening as often as they should. Combined with not being able to use the C65 ROM, this means I had to side-load SynthMark64 via the serial monitor, start it directly from the serial monitor, and then use the serial-monitor to stuff the ENTER key-press into the keyboard buffer. So there is still a bit to go, but at least it feels like I am getting somewhere.