Tuesday 1 April 2014

Progress towards CPU speed-ups

The last few days I have been fighting against some subtle bugs introduced recently while trying to speed the processor up a bit.  The machine is almost working, but not booting properly for reasons I have yet to figure out.

Today at lunch Redback dropped by the lab to say hello and see the hardware in action.  However, I didn't have a working FPGA bitstream for the FPGA from the last good point.  

But after some poke and fiddle with the latest bitstream, it spontaneously booted to the C64 READY prompt after I wrote to a random piece of memory from the serial monitor interface.  Most bizarre.

Nonetheless, we seized the moment to run synthmark64, which was showing x18.69, I think because the read-modify-write (RMW) optimisation was running, even on IO addresses.  I need to fix that. So then I set the bit to enable the optimisation for hiding memory read wait states when possible.  That did work, and as the result below show provides a roughly 30% speed up.  

This makes the current C65GS prototype 24 times faster than a stock C64, and faster than all other known accelerators overall and for each instruction group, excepting for reading zero page, where the Chameleon is slightly faster.

Anyway, here is the screen show before things went bad when I tried to toggle the RMW optimisation.

I still hope to push the acceleration to closer to x50 in due course.

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