Friday, 17 July 2020

ACME Support for the MEGA65's 45GS02 CPU, Porting HYPPO to ACME

A couple of weeks back, the latest release of ACME added support for the MEGA65's CPU via the m65 CPU type.  This provides 1st-class support for all of the 4510 opcodes, as well as the 45GS02 extended instructions.  So now you can, for example, do:

LDA [zppointer],z

to read any memory address, where the address is stored in the four Zero-Page bytes at zppointer.

Or if you want to load a 32-bit value into A,X,Y and Z at the same time, and add it to another 32-bit value, before putting it back somewhere else, you can do something like:

LDQ $1234
CLC
ADCQ $1238
STQ $123C

There are even a few instructions that support combining the two, e.g., to add some 32-bit values from anywhere in memory, you could do:

LDQ [$12]
CLC
ADCQ [$16]
STQ [$1A]

Note that these instructions are not indexed by the Z register, because the Z register forms part of the virtual "Q" register.

You can of course also use all the new instructions like LDZ, PHX, PHY, PHZ, TAB, BRA etc.

So, now that ACME supports the MEGA65, I spent part of the afternoon porting the MEGA65's Hypervisor programme, HYPPO, from KickAss to ACME.  I like  KickAss and its accomplice, KickC, a lot. But ACME edges it out with its better 1st class support for the MEGA65 CPU extensions, its open-source nature, and that it is written in pure C, and so might be able to be compiled to run natively on the MEGA65 one day.

I was expecting this to be harder than it was.  Mostly it consisted of converting comments from KickAss's Java-style comments to ACME's traditional ; comments, and changing lots of pseudo opcodes, like .byte becomes !8, and .label is not needed. The hardest part was fixing a few constant expressions, to make sure that the instructions still produced ZP instructions.

There isn't really much to show, as HYPPO now works just exactly like it did before.  But since every blog post should have an image in it, here is a random screenshot of the new HYPPO running:


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